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| Latest
Events |
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"Workshop on Methodologies for Effective Software
Testing" |
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April 15-16, 2011 - Bangalore |
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For more details
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Multi-Core
Systems - Detailed |
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Symposium on
Issues in the Design of Complex Multi-Core Systems
Oct. 20 – 22, 2010
The Goldfinch Hotel, Crescent Road, Bangalore
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Technical Program
Agenda
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Day 1 (20th Oct 2010 – Wednesday) |
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Time |
Description |
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8:45 AM |
Registration |
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9:30 AM |
Welcome and Inaugural Address |
[ Padma Bhushan Prof. V. Rajaraman, IISc ] |
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9:45 AM |
Multi-Core Architecture Landscape |
[ Mr. Rohit Vidwans, Intel ]
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10:45 AM |
Challenges in Multi Core Systems |
[ Mr. Shakti Kapoor, IBM USA ]
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11:45
AM |
COFFEE BREAK |
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12:00 PM |
CxO Panel Discussion – Is Multi-Core a Panacea?
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[ Moderator:
S. K. Nandy, IISc ]
[ Participants:
Rohit Vidwans, Intel;
G. Guruswamy, Freescale;
Shakti Kapoor, IBM;
J Pillai, NI ] |
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1.00 |
LUNCH |
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2:00 PM |
Data Parallel Model on Accelerators and OpenCL |
[ Prof. P.J. Narayanan, IIIT-Hyd. ] |
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2:50 PM |
Data-level versus Task-level Parallelism |
[ Prof. R Govindarajan; SERC-IISc ]
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3:45
PM |
TEA BREAK |
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4:00PM |
Multicore
Migration Strategy |
[ Mr. Harpreet
Singh Anand, Freescale ]
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4:45 PM |
Considerations in Large Scale Parallelism |
[ Dr. Murali Kota, IBM ] |
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5.30 PM |
CLOSE |
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Day 2 (21st Oct 2010
– Thursday) |
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Time |
Description |
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9:30 AM |
System Design – Simulation Support |
[ S. Dhanabal, National
Instruments ]
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10:30 AM |
Debugging, Tracing and System profiling |
[ Ms. Lavanya Ramapantulu, ARM ] |
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11:15
AM |
COFFEE BREAK |
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11:30 AM |
Operating System Dependencies |
[ Dr. S.K.
Ghoshal & Dr. S.M.Srinidhi ] |
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12:15 PM |
Managing Programming complexity |
[ Mr. Dhananjay Nene, Vayana Ent. ]
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1.00 |
LUNCH |
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2:00
PM |
Static and Dynamic Optimization in Compilers |
[ Ms. Sandya
Mannarswamy, HP ]
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3:00 PM |
Choice of Middleware and Framework |
[ Mr. Sanjay
Sharma, Impetus ] |
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3:45
PM |
TEA BREAK |
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4:00 PM |
Homogenous
Vs Heterogeneous Multi-Core Differences |
[ Mr. Ish K
Dham, Texas Instruments ]
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4:45 PM |
Multi-Core System Performance |
[ Dr. Ranjani
Narayan, Morphing Machines ] |
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5.30 PM |
CLOSE |
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Day 3 (22nd Oct 2010
– Friday) |
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Time |
Description |
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9:30 AM |
Verification Methodologies for Multi-Core Systems |
[ TBA ] |
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10:30
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A Framework for Multi Core Application Verification |
[ Mr. Abhijit Deshpande, SoftJin Tech. ]
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11:15
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COFFEE BREAK |
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11:30 AM |
Application Case Study with Code-Walk |
[ Ms. Gayathri M, Intel ]
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12:15 PM |
Application Case Study |
[ Mr. Sarang Shelke, TenSilica Semi ] |
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1.00 |
LUNCH |
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2:00
PM |
The Intel 80 Tile NoC Teraflop Journey |
[ Mr.
Shailendra Jain, Intel ]
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2:45 PM |
Multi-Core & DSP in 3G LTE Applications |
[ Dr.
Mukesh Taneja, Freescale ] |
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3:30
PM |
TEA BREAK |
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3:45 PM |
JUST FOR JEST
[Open Forum to debate new challenges with
Probability Processors, In-Memory Computing, Quantum
Computing and others] |
[ 5
speakers, 5 mins each and Open House ] |
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5.00 PM |
SYMPOSIUM CLOSE |
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